Multi-core system and external input/output bus control method

摘要

A multi-core system includes processor cores having caches; an external input/output bus connected to the processor cores; memory accessed by the processor cores via the external input/output bus; profile information indicating the volume of a write access to the memory by tasks concurrently allocated to the processor cores and whether a cache miss will occur in a read access to the caches; and an operating system that controls clock frequency of the external input/output bus to be a first frequency, based on the volume of the write access to the memory by the tasks and the bus width of the external input/output bus when a cache miss in read access is judged to not occur in executing the tasks and that controls the clock frequency of the external input/output bus to be a second frequency higher than the first frequency when a cache miss in read access is judged.

主权项

1. A multi-core system comprising:
a plurality of processor cores having caches; an external input/output bus connected to each of the processor cores; a memory accessed by each of the processor cores by way of the external input/output bus; profile information including information concerning the volume of a write access to the memory by each task to be allocated to the processor cores and information as to whether a cache miss will occur in a read access to the caches; and an operating system that controls a clock frequency of the external input/output bus so as to be set at a first frequency, based on the volume of the write access to the memory by each of the tasks to be concurrently allocated to the processor cores and the bus width of the external input/output bus when a cache miss in read access is judged to not occur in execution of the tasks, based on the profile information and that controls the clock frequency of the external input/output bus so as to be set at a second frequency higher than the first frequency when a cache miss in read access is judged to occur in the execution of the tasks to be concurrently allocated to the processor cores.