发明名称 |
Non-planar III-V field effect transistors with conformal metal gate electrode and nitrogen doping of gate dielectric interface |
摘要 |
A high-k gate dielectric interface with a group III-V semiconductor surface of a non-planar transistor channel region is non-directionally doped with nitrogen. In nanowire embodiments, a non-directional nitrogen doping of a high-k gate dielectric interface is performed before or concurrently with a conformal gate electrode deposition through exposure of the gate dielectric to liquid, vapor, gaseous, plasma, or solid state sources of nitrogen. In embodiments, a gate electrode metal is conformally deposited over the gate dielectric and an anneal is performed to uniformly accumulate nitrogen within the gate dielectric along the non-planar III-V semiconductor interface. |
申请公布号 |
US8890264(B2) |
申请公布日期 |
2014.11.18 |
申请号 |
US201213627971 |
申请日期 |
2012.09.26 |
申请人 |
Intel Corporation |
发明人 |
Dewey Gilbert;Chau Robert S.;Radosavljevic Marko;Then Han Wui;Clendenning Scott B.;Pillarisetty Ravi |
分类号 |
H01L29/78;H01L29/66;H01L29/06;H01L21/02;H01L21/28 |
主分类号 |
H01L29/78 |
代理机构 |
Blakely, Sokoloff, Taylor & Zafman LLP |
代理人 |
Blakely, Sokoloff, Taylor & Zafman LLP |
主权项 |
1. A non-planar field effect transistor (FET), comprising:
a source region and a drain region with a III-V semiconductor channel region disposed there between; a gate dielectric layer disposed over the semiconductor channel region, wherein the gate dielectric layer comprises a metal oxide, and further comprises nitrogen dopants incorporated in the gate dielectric layer, the nitrogen dopants are proximal an interface between the gate dielectric and the III-V semiconductor channel region; and a gate electrode disposed over the gate dielectric layer. |
地址 |
Santa Clara CA US |