发明名称 |
Method and system for improving serial port memory communication latency and reliability |
摘要 |
A method, apparatus and system for reducing memory latency is disclosed. In one embodiment, data between a host computer system and a memory is communicated via a port or a group of ports at the memory over multiple time intervals, wherein the host computer is coupled to the memory. Further, a command associated with the data is communicated between the host computer system and the memory via the port or the group of ports over a single time interval. |
申请公布号 |
US8892825(B2) |
申请公布日期 |
2014.11.18 |
申请号 |
US201313850147 |
申请日期 |
2013.03.25 |
申请人 |
Silicon Image, Inc. |
发明人 |
Ruberg Alan;Lee Seung-jong;Lee Hyung Rok;Shim Daeyun;Lee Dongyun;Kim Sungjoon;Murthy Anu |
分类号 |
G06F12/00;G06F13/16;G11C5/06;G06F11/14;G11C7/10;G06F13/42 |
主分类号 |
G06F12/00 |
代理机构 |
Fenwick & West LLP |
代理人 |
Fenwick & West LLP |
主权项 |
1. A method for reducing memory latency comprising:
communicating data between a host computer system and a memory via a port or a group of ports at the memory over multiple time intervals, wherein the host computer is coupled to the memory, the port being a member of the group of ports; and communicating a command associated with the data between the host computer system and the memory via the port or the group of ports over a single time interval, wherein the command is duplicated into one or more duplicate commands to enhance error detection to prevent an errant command from corrupting memory operations, wherein the command is duplicated without having to duplicate the data. |
地址 |
Sunnyvale CA US |