At-speed testing of multi-die integrated circuits

摘要

An integrated circuit (IC) structure can include an interposer including a plurality of inter-die wires and a first die coupled to the interposer. The first die can include a first output including a first flip-flop coupled to a first inter-die wire of the plurality of inter-die wires and a first input including a second flip-flop coupled to a second inter-die wire of the plurality of inter-die wires. The IC structure can include a second die coupled to the interposer. The second die can be configured with a first circuit design forming circuitry that couples the first inter-die wire to the second inter-die wire.

主权项

1. An integrated circuit (IC) structure, comprising:
an interposer comprising a plurality of inter-die wires; a first die coupled to the interposer, wherein the first die comprises a first output comprising a first flip-flop coupled to a first inter-die wire of the plurality of inter-die wires and a first input comprising a second flip-flop coupled to a second inter-die wire of the plurality of inter-die wires; and a second die coupled to the interposer, wherein the second die is configured with a first circuit design forming circuitry that couples the first inter-die wire to the second inter-die wire; wherein the first circuit design forms a loop-back path coupling the first inter-die wire with the second inter-die wire within the second die.