发明名称 Method of manufacturing a chip support board structure
摘要 A method of manufacturing a chip support board structure which includes the steps of forming a metal substrate structure, forming a photo resist pattern, etching the metal substrate structure to form a paddle, removing the photo resist pattern, pressing an insulation layer against the paddle, polishing the insulation layer, forming a circuit layer and forming a solder resist is disclosed. The metal substrate structure is formed by sandwiching a block layer with two metal substrate layers, multilayer. The metal substrate structure is etched under control to an effective depth such that each paddle thus formed has the same shape and depth. Therefore, the method of the present invention can be widely applied to the general mass production processes to effectively solve the problems in the prior arts due to depth differences, such offset, position mismatch and peeling off in the chip support board.
申请公布号 US8887386(B2) 申请公布日期 2014.11.18
申请号 US201213663333 申请日期 2012.10.29
申请人 Kinsus Interconnect Technology Corp. 发明人 Lin Ting-Hao;Lu Yu-Te;Lu De-Hao
分类号 H05K3/02 主分类号 H05K3/02
代理机构 Lin & Associates IP, Inc. 代理人 Lin & Associates IP, Inc.
主权项 1. A method of manufacturing a chip support board structure, comprising steps of: forming a metal substrate structure by sequentially performing a deposition process and a pressing process, wherein the deposition process deposits a block layer on an lower metal substrate and the pressing process presses an upper metal substrate against the block layer on the lower metal substrate such that the metal substrate structure with a multilayer structure is formed; forming a photo resist pattern on the upper metal substrate; using an etching agent to etch part of the upper metal substrate not masked by the photo resist pattern so as to form a paddle, wherein the etching agent does not react with the block layer; removing the photo resist pattern; pressing an insulation layer against the paddle such that the insulation layer fills up a space between the block layer and the paddle; polishing the insulation layer to flatten an upper surface of the insulation layer and expose an upper surface of the paddle such that the upper surface of the paddle and the upper surface of the insulation layer form a co-plane surface; forming a circuit layer on the co-plane surface by an image transfer process, wherein the circuit layer covers part of the upper surface of the insulation layer and part of the upper surface of the paddle so as to connect with the paddle; and forming a solder resist on the co-plane surface, wherein the solder resist covers part of the insulation layer and part of the paddle which are not covered by the circuit layer, and part of the circuit layer.
地址 Taoyuan TW