发明名称 |
Reducing read failure in a memory device |
摘要 |
Read failure is reduced by increasing the drain current through a serial string of memory cells during the read operation. In one embodiment, this is accomplished by using a higher read pass voltage for unselected word lines when the selected word line is within a predetermined distance of the drain side of the memory block array. If the selected word line is closer to the source side, a lower read pass voltage is used. In another embodiment, the cells on the word lines closer to the drain side of the memory block array are erased to a lower threshold voltage than the memory cells on the remaining word lines. |
申请公布号 |
US8891309(B2) |
申请公布日期 |
2014.11.18 |
申请号 |
US201113272336 |
申请日期 |
2011.10.13 |
申请人 |
Micron Technology, Inc. |
发明人 |
Aritome Seiichi;Torsi Alessandro;Musilli Carlo |
分类号 |
G11C11/34;G11C16/04;G11C16/34 |
主分类号 |
G11C11/34 |
代理机构 |
Dicke, Billig & Czaja, PLLC |
代理人 |
Dicke, Billig & Czaja, PLLC |
主权项 |
1. A method for reducing read failure in a memory device having a memory array with a drain side and a source side, the method comprising:
determining if a selected word line is closer to the drain side or the source side; and biasing unselected word lines with a first voltage if the selected word line is closer to the drain side, with a second voltage if the selected word line is closer to the source side, and with a third voltage if the selected word line is closer to a middle of the array between the source side and the drain side; wherein biasing unselected word lines with the third voltage comprises biasing an unselected word line on a drain side of the selected word line and an unselected word line on a source side of the selected word line with the third voltage; wherein the first voltage is greater than the second voltage; and wherein the drain side is at a higher potential than the source side. |
地址 |
Boise ID US |