| 发明名称 |
Method for analyzing circuit pattern |
| 摘要 |
A method for analyzing circuit pattern is disclosed. The method includes the steps of: providing a plurality of monitor metal line structures formed on discrete locations of a substrate corresponding to different values of variable factors; performing a defect review to identify failure locations of the monitor metal line structures; determining a failure tendency of the monitor metal line structures so as to determine a boundary of the variable factors; and determining whether adjustment is to be made to product metal line structures. |
| 申请公布号 |
US8890084(B1) |
申请公布日期 |
2014.11.18 |
| 申请号 |
US201314016243 |
申请日期 |
2013.09.03 |
| 申请人 |
United Microelectronics Corp. |
发明人 |
Guo Bin;Ma Xu;Liao Hong |
| 分类号 |
G01J1/42;G01N23/00 |
主分类号 |
G01J1/42 |
| 代理机构 |
|
代理人 |
Hsu Winston;Margo Scott |
| 主权项 |
1. A method for analyzing circuit pattern, comprising:
providing a plurality of monitor metal line structures formed on discrete locations of a substrate corresponding to different values of variable factors; performing a defect review to identify failure locations of the monitor metal line structures; determining a failure tendency of the monitor metal line structures so as to determine a boundary of the variable factors; and determining whether adjustment is to be made to product metal line structures. |
| 地址 |
Science-Based Industrial Park, Hsin-Chu TW |
