发明名称 |
METAL-OXIDE-SEMICONDUCTOR (MOS) VOLTAGE DIVIDER WITH DYNAMIC IMPEDANCE CONTROL |
摘要 |
Metal-Oxide-Semiconductor (MOS) voltage divider with dynamic impedance control. In some embodiments, a voltage divider may include two or more voltage division cells, each voltage division cell having a plurality of Metal-Oxide-Semiconductor (MOS) transistors, a least one of the plurality of MOS transistors connected to a signal path and at least another one of the plurality of MOS transistors connected to a control path, the voltage division cell configured to provide a voltage drop across the signal path based upon a control signal applied to the control path. |
申请公布号 |
US2014333367(A1) |
申请公布日期 |
2014.11.13 |
申请号 |
US201313890394 |
申请日期 |
2013.05.09 |
申请人 |
FREESCALE SEMICONDUCTOR, INC. |
发明人 |
Coimbra Ricardo P.;Silva, JR. Edevaldo Pereira |
分类号 |
H03K17/16 |
主分类号 |
H03K17/16 |
代理机构 |
|
代理人 |
|
主权项 |
1. A voltage divider, comprising:
a voltage division cell including:
a first N-type Metal-Oxide-Semiconductor (NMOS) transistor;a first P-type (PMOS) transistor coupled in series with the first NMOS transistor, a source terminal of the first NMOS transistor connected to a source terminal of the first PMOS transistor, and a gate terminal of the first PMOS transistor connected to a drain terminal of the first PMOS transistor;a second NMOS transistor having a gate terminal connected to a gate terminal of the first NMOS transistor; anda second PMOS transistor coupled in series with the second NMOS transistor, a source terminal of the second NMOS transistor connected to a source terminal of the second PMOS transistor, a drain terminal of the second NMOS transistor connected to the gate terminal of the second NMOS transistor, and a gate terminal of the second PMOS transistor connected to the gate terminal of the first PMOS transistor. |
地址 |
Austin TX US |