发明名称 |
AUTOMATIC LOOP-BANDWIDTH CALIBRATION FOR A DIGITAL PHASED-LOCKED LOOP |
摘要 |
A phase-locked loop digital bandwidth calibrator includes a digital loop filter having a gain multiplier memory and a perturbation unit configured to generate a calibration offset signal to initiate a calibration. Additionally, the phase-locked loop digital bandwidth calibrator also includes a digital bandwidth calibration unit configured to provide a corrected nominal gain for storage in the gain multiplier memory, wherein a digital gain correction for the corrected nominal gain is determined by a digital integration stage and a correction database. A phase-locked loop digital bandwidth calibration method is also provided. |
申请公布号 |
US2014333351(A1) |
申请公布日期 |
2014.11.13 |
申请号 |
US201313888490 |
申请日期 |
2013.05.07 |
申请人 |
NVIDIA CORPORATION |
发明人 |
Ba Seydou;Bellaouar Abdellatif;Fridi Ahmed R. |
分类号 |
H03L7/085 |
主分类号 |
H03L7/085 |
代理机构 |
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代理人 |
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主权项 |
1. A phase-locked loop digital bandwidth calibrator, comprising:
a digital loop filter having a gain multiplier memory; a perturbation unit configured to generate a calibration offset signal to initiate a calibration; a digital bandwidth calibration unit configured to provide a corrected nominal gain for storage in the gain multiplier memory, wherein a digital gain correction for the corrected nominal gain is determined by a digital integration stage and a correction database. |
地址 |
Santa Clara CA US |