发明名称 REDUCTION OF BUFFER OVERFLOW
摘要 Technology for reducing buffer overflow at a Third Generation Partnership Project (3GPP) Serving Gateway (S-GW) is described. A buffer overflow message may be received, at an evolved node B (eNB) from the S-GW, indicating potential overflow of downlink information at an S-GW buffer. The downlink information may be stored at the S-GW buffer until a plurality of user equipments (UEs) awake from a low power mode during a discontinuous reception (DRX) sleep cycle. One or more UEs may be selected from the plurality of UEs according to predefined criteria, wherein the one or more UEs are in a connected mode. The DRX configurations of the one or more UEs may be modified in order to reduce the downlink information that is stored at the S-GW buffer, thereby reducing the potential for overflow at the S-GW buffer.
申请公布号 WO2014182340(A1) 申请公布日期 2014.11.13
申请号 WO2013US75474 申请日期 2013.12.16
申请人 INTEL IP CORPORATION;KOC, ALI;JHA, SATISH;GUPTA, MARUTI;VANNITHAMBY, RATH 发明人 KOC, ALI;JHA, SATISH;GUPTA, MARUTI;VANNITHAMBY, RATH
分类号 H04W28/14;H04W52/00 主分类号 H04W28/14
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