SYSTEMS AND METHODS FOR ACQUIRING A RECEIVED DATA SIGNAL IN A CLOCK AND DATA RECOVERY CIRCUIT

摘要

A clock a data recovery circuit (CDR) operates recovers data from a serial input signal. The CDR uses oversampling to sample the serial input signal at multiple phases. The multiple phases are generated from a reference clock that is not locked to the data rate of the serial input signal. A maximum of two phases are used at a time. The resulting CDR provides high performance while having low power consumption.