发明名称 |
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE |
摘要 |
A nonvolatile semiconductor memory device includes: a memory cell array having a plurality of memory cells arranged in a matrix; a reference bit line; a reference source line; at least one reference cell including first and second transistors serially connected between these lines; a reference word line connected to the gate of the first transistor; and a reference driver circuit configured to control the gate voltage of the second transistor. |
申请公布号 |
US2014334217(A1) |
申请公布日期 |
2014.11.13 |
申请号 |
US201414340518 |
申请日期 |
2014.07.24 |
申请人 |
PANASONIC CORPORATION |
发明人 |
UEDA Takanori;KOUNO Kazuyuki |
分类号 |
G11C5/06;G11C13/00 |
主分类号 |
G11C5/06 |
代理机构 |
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代理人 |
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主权项 |
1. A nonvolatile semiconductor memory device comprising:
a memory cell array having a plurality of memory cells each including a nonvolatile semiconductor memory element arranged in a matrix; a plurality of word lines placed in one-to-one correspondence with rows of the memory cell array and each connected in common to a plurality of memory cells arranged in a corresponding one of the rows; a plurality of bit lines placed in one-to-one correspondence with columns of the memory cell array and each connected in common to a plurality of memory cells arranged in a corresponding one of the columns; a plurality of source lines; a reference bit line; a reference source line; at least one reference cell including first and second transistors serially connected between the reference bit line and the reference source line; a reference word line connected to a gate of the first transistor of the reference cell; and a reference driver circuit configured to control a gate voltage of the second transistor of the reference cell. |
地址 |
Osaka JP |