Low Noise and High Performance LSI Device

摘要

In semiconductor devices in which both NMOS devices and PMOS devices are used to perform in different modes such as analog and digital modes, stress engineering is selectively applied to particular devices depending on their required operational modes. That is, the appropriate mechanical stress, i.e., tensile or compressive, can be applied to and/or removed from devices, i.e., NMOS and/or PMOS devices, based not only on their conductivity type, i.e., n-type or p-type, but also on their intended operational application, for example, analog/digital, low-voltage/high-voltage, high-speed/low-speed, noise-sensitive/noise-insensitive, etc. The result is that performance of individual devices is optimized based on the mode in which they operate. For example, mechanical stress can be applied to devices that operate in high-speed digital settings, while devices that operate in analog or RF signal settings, in which electrical noise such as flicker noise that may be introduced by applied stress may degrade performance, have no stress applied.

主权项

1. A semiconductor device comprising:
a first transistor of an n-type conductivity in a first area of the semiconductor device; a second transistor of a p-type conductivity in the first area of the semiconductor device; a third transistor of an n-type conductivity in a second area of the semiconductor device; a fourth transistor of a p-type conductivity in the second area of the semiconductor device; a first stress control layer on the first transistor, wherein a first stress is applied to a channel of the first transistor by the first stress control layer; and a second stress control layer on the second transistor, wherein a second stress is applied to a channel of the second transistor by the second stress control layer and the second stress is not applied to a channel of the fourth transistor.