发明名称 CORRELATED DOUBLE SAMPLING CIRCUIT, METHOD THEREOF AND DEVICES HAVING THE SAME
摘要 A CDS circuit includes first capacitors; second capacitors; and a switch arrangement which, in response to a switch control signal, connects the first capacitors in series between a pixel signal output node and a ground to compress the pixel signal and connects the second capacitors in series between a ramp signal output node and the ground to compress the ramp signal, or connects the first capacitors in parallel between the pixel signal output node and a first input node of the comparator and connects the second capacitors in parallel between the ramp signal output node and a second input node of the comparator.
申请公布号 US2014333813(A1) 申请公布日期 2014.11.13
申请号 US201414276687 申请日期 2014.05.13
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 PARK Yu Jin;SEO Jin Ho;HAM Seog Heon;LEE Kwang Hyun;YANG Han
分类号 H04N5/3745 主分类号 H04N5/3745
代理机构 代理人
主权项 1. A correlated double sampling (CDS) circuit comprising: a plurality of first capacitors; a plurality of second capacitors; and a switch arrangement which, in response to a switch control signal, at least one of: connects the plurality of first capacitors in series between a pixel signal output node and a ground to compress the pixel signal and connects the plurality of second capacitors in series between a ramp signal output node and the ground to compress the ramp signal, or connects the plurality of first capacitors in parallel between the pixel signal output node and a first input node of the comparator and connects the plurality of second capacitors in parallel between the ramp signal output node and a second input node of the comparator.
地址 Suwon-si KR