| 发明名称 |
QUADRATURE LATTICE MATCHING NETWORK |
| 摘要 |
Embodiments include but are not limited to apparatuses and systems including a quadrature lattice matching network including first path having a series inductor and a shunt inductor, and a second path having a series capacitor and a shunt capacitor. Other embodiments may be described and claimed. |
| 申请公布号 |
US2014333383(A1) |
申请公布日期 |
2014.11.13 |
| 申请号 |
US201414338262 |
申请日期 |
2014.07.22 |
| 申请人 |
TriQuint Semiconductor, Inc. |
发明人 |
Wright Peter V. |
| 分类号 |
H03F3/24;H03F3/21;H03F3/19 |
主分类号 |
H03F3/24 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An apparatus comprising:
a first power amplifier; a second power amplifier; and a quadrature lattice matching network including a first path coupled with the first power amplifier and having a series inductor and a shunt inductor, and a second path coupled with the second power amplifier and having a series capacitor and a shunt capacitor, wherein the first power amplifier is to operate with a phase difference of approximately ninety degrees with respect to the second power amplifier. |
| 地址 |
Hillsboro OR US |
