发明名称 SIMULATION APPARATUS, SIMULATION METHOD, AND SIMULATION PROGRAM
摘要 PROBLEM TO BE SOLVED: To improve accuracy for estimating processor performance.SOLUTION: A simulation apparatus 100 detects an internal state of a target CPU to execute an out-of-order for an operation simulation sim if a target block of the operation simulation sim changes when the target CPU executes a target program pgr. The simulation apparatus 100 generates correspondence information 101 in which the detected internal state corresponds to a performance value of each instruction included in the target block for the detected internal state by a static timing analysis. The simulation apparatus 100 calculates a performance value in a case where the target CPU executes the target block by executing an execution code ec that enables the performance value in a case where the target CPU executes the target block to be calculated according to the correspondence information by using the correspondence information on the detected internal state and the generated target block.
申请公布号 JP2014211768(A) 申请公布日期 2014.11.13
申请号 JP20130087874 申请日期 2013.04.18
申请人 FUJITSU LTD 发明人 DAVID TSAI;IKE ATSUSHI
分类号 G06F11/28;G06F11/34 主分类号 G06F11/28
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