PROVIDING A VOID-FREE FILLED INTERCONNECT STRUCTURE IN A LAYER OF A PACKAGE SUBSTRATE

摘要

Embodiments of the present disclosure are directed towards techniques and configurations for providing void-free filled interconnect structures in a dielectric layer of a package assembly. In one embodiment, the method for providing a void-free filled interconnect structure may include forming a through hole through a layer of a package substrate, and depositing a conductive material to fill the through hole. Depositing the conductive material may be performed while gradually increasing a current density of the conductive material and correspondingly changing a flow rate of the conductive material. Other embodiments may be described and/or claimed.

主权项

1. A method, comprising:
forming a through hole through a layer of an integrated circuit (IC) substrate; depositing a conductive material to fill the through hole, wherein depositing the conductive material is performed while gradually increasing a current density of the conductive material and changing a flow rate of the conductive material; and forming, with the conductive material, a bridge connecting opposing sidewalls of the through hole approximately at a center of the through hole to provide, inside the through hole, a first opening extending from a first end of the through hole to the bridge and a second opening extending from a second end of the through hole to the bridge.