CONTROL APPARATUS, ANALYSIS APPARATUS, ANALYSIS METHOD, AND COMPUTER PRODUCT

摘要

A cache controller receives a reference request from a CPU executing a program in which information indicative of a reference request specifying in shared memory, an area not having an update request and information indicative of a snoop reference request are distinguished from one another. When the reference request specifying an area not having the update request is received, the cache controller acquires from the shared memory and without performing a snoop process, information stored in the specified area. The cache controller stores the information acquired from the shared memory to the cache memory of the CPU executing the program.

主权项

1. A control apparatus that, for each memory configured to temporarily store first information that is stored in a shared memory shared by a plurality of CPUs respectively having the memories or second information that is to be stored in the shared memory, controls access from each of the CPUs to the memories, the control apparatus comprising:
a receiving unit configured to receive any one among a first and a second reference request from a CPU executing a program in which information indicative of the first reference request specifying in the shared memory, an area not having an update request is distinguished from information indicative of the second reference request specifying in the shared memory, an area having an update request; an acquiring unit configured to acquire from the shared memory and when the receiving unit receives the first reference request, the first information stored in the specified area, the acquiring unit acquiring the first information without performing for the first information stored in the specified area or the second information, a snoop process that is based on a storage state of the memory of the CPU executing the program; and a storing unit that stores into the memory of the CPU executing the program, the information acquired by the acquiring unit.