发明名称 FANOUT LINE STRUCTURE OFARRAY SUBSTRATE AND DISPLAY PANEL
摘要 A fanout line structure of an array substrate includes a plurality of fanout lines arranged on a fanout area of the array substrate, where resistance value of the fanout line is dependent on length of the fanout line. Each of the fanout lines comprises a first conducting film. Resistance values of a first part of fanout lines are less than resistance values of a second part of the fanout lines, and the first part of fanout lines are covered by an additional conducting film. In the fanout lines covered by the additional conducting film, as the resistance value of the fanout line, increases, area of the additional conducting film covering the fanout line correspondingly decreases. An additional capacitor is generated between the additional conducting film and the first conducting film.
申请公布号 US2014332898(A1) 申请公布日期 2014.11.13
申请号 US201314008539 申请日期 2013.06.28
申请人 Du Peng 发明人 Du Peng
分类号 H01L27/12 主分类号 H01L27/12
代理机构 代理人
主权项 1. A fanout line structure of an array substrate, comprising: a plurality of fanout lines arranged on a fanout area of the array substrate; wherein resistance value of the fanout line is dependent on length of the fanout line; each of the fanout lines comprises a first conducting film; resistance values of a first part of fanout lines are less than resistance values of a second part of the fanout lines, and the first part of the fanout lines are covered by an additional conducting film; in the fanout lines covered by the additional conducting film, as the resistance value of the fanout line increases, area of the additional conducting film covering the fanout line correspondingly decreases; an additional capacitor is generated between the additional conducting film and the first conducting film.
地址 Shenzhen CN