| 摘要 |
<p>A method for manufacturing a transistor, the method comprising the providing a dummy gate structure on a substrate, comprising a gate dielectric layer and dummy gate electrode layer, the dummy gate structure being laterally defined by inner sidewalls of a set of spacers; laterally embedding the dummy gate structure, removing the dummy gate electrode; and providing a final gate electrode layer replacing the dummy gate electrode layer in between the inner sidewalls of the set of spacers; wherein providing a final gate electrode layer comprises
- providing a connected diffusion layer, the diffusion layer extending at least on top of the gate dielectric layer, on inner sidewalls of the set of spacers, and at least on a portion of a front surface of embedding layers for the dummy gate structure;
- providing a metal layer comprising a metal on top of the diffusion layer;
- applying an anneal step, the anneal step being adapted for driving diffusion of the metal into the diffusion layer, and for further diffusing the metal in the diffusion layer towards the portion of the diffusion layer in the area corresponding to the area of the gate dielectric;
- filling the area in between the inner sidewalls of the set of spacers with a final gate metal filling layer; and associated transistor.</p> |
