| 摘要 |
<p>A capacitive voltage divider arrangement includes a first and second voltage divider and a first and second parasitic capacitance formed between the first and second capacitive voltage divider. The first capacitive voltage divider includes: a signal terminal; first capacitance for coupling the terminal to a reference potential; second capacitance; and third capacitance that is coupleable to the reference potential, the second capacitance being coupled in-between the terminal and third capacitance. The second capacitive voltage divider includes: a first compensation capacitance for coupling the terminal to the reference potential, the first compensation capacitance further being coupled to the terminal via the first parasitic capacitance; second compensation capacitance; and third compensation capacitance that is coupleable to the reference potential, the second compensation capacitance being coupled in-between the terminal and third compensation capacitance, and the second parasitic capacitance coupling the third capacitance to the third compensation capacitance.</p> |
