| 摘要 |
<p>The present invention provides method of fabricating an erasable programmable single-poly nonvolatile memory, comprising steps of: defining a first area (A) and a second area (B) in a first type substrate; forming a second type well region in the first area (A); forming a first gate oxide layer (342) and a second gate oxide layer (362) covered on a surface of the first area (A), wherein the second gate oxide layer (362) is extended to and is adjacent to the second area (B); forming a DDD region in the second area; etching a portion (362b) of the second gate oxide layer above the second area (B) which forms an erase gate region; forming two polysilicon gates (34, 36)covered on the first (342) and the second (32, 362a, 362b) gate oxide layers; and defining a second type doped region in the DDD region and a first type doped regions in the second type well region. The polysilicon gate (36) on the second gate oxide layer (362) forms a floating gate and the polysilicon gate (34) on the first gate oxide layer (342) forms part of a select transistor.</p> |
