发明名称 BIAS VOLTAGE GENERATOR, CLOCK BUFFER INCLUDING THE SAME AND METHOD OF OPERATING CLOCK BUFFER
摘要 <p>A clock buffer includes a reference voltage generator, an amplifier, a current mirror part, a compensator, and a clock part. The reference voltage generator generates and provides a reference voltage. The amplifier generates an amplified voltage based on the reference voltage and a feedback voltage. The current mirror part generates the feedback voltage and a bias voltage based on the amplified voltage and compensation current. The compensator generates the compensation current which is increased as the operation temperature is increased based on the feedback voltage. The clock part buffers an input clock and generates an output clock based on the bias voltage. A current mode logic (CML) buffer increases a clock delay as the operation temperature is increased and decreases the clock delay as the bias voltage is increased. Therefore, the present invention increases the bias voltage as the operation temperature is increased, thereby improving clock delay sensitivity according to the operation temperature of the CML buffer.</p>
申请公布号 KR20140130779(A) 申请公布日期 2014.11.12
申请号 KR20130049137 申请日期 2013.05.02
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 DOO, SU YEON;BAE, SEUNG JUN;SOHN, YOUNG SOO;SONG, HO SUNG;IHM, JEONG DON
分类号 G05F3/26;G05F3/02 主分类号 G05F3/26
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