发明名称 効率的な決定論的マルチプロセッシング(DETERMINISTICMULTIPROCESSING)
摘要 <p>A hardware and/or software facility for controlling the order of operations performed by threads of a multithreaded application on a multiprocessing system is provided. The facility may serialize or selectively-serialize execution of the multithreaded application such that, given the same input to the multithreaded application, the multiprocessing system deterministically interleaves operations, thereby producing the same output each time the multithreaded application is executed. The facility divides the execution of the multithreaded application code into two or more quantum specifying a deterministic number of operations, and the facility specifies a deterministic order in which the threads execute the two or more quantum. The deterministic number of operations may be adapted to follow the critical path of the multithreaded application. Specified memory operations may be executed regardless of the deterministic order, such as those accessing provably local data. The facility may provide dynamic bug avoidance and sharing of identified bug information.</p>
申请公布号 JP5624480(B2) 申请公布日期 2014.11.12
申请号 JP20100550845 申请日期 2009.03.11
申请人 发明人
分类号 G06F9/52 主分类号 G06F9/52
代理机构 代理人
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