发明名称 Diffusion barrier layer for group III nitride on silicon substrate
摘要 The present disclosure is directed to an integrated circuit and its formation. In some embodiments, the integrated circuit includes a diffusion barrier layer. The diffusion barrier layer can be arranged to prevent diffusion of the Si and O2 from a Si substrate into a Group III nitride layer. The diffusion barrier layer can comprise Al2O3. In some embodiments, the integrated circuit further comprises a lattice-matching structure disposed between the silicon substrate and a Group III nitride layer.
申请公布号 US8884268(B2) 申请公布日期 2014.11.11
申请号 US201213549610 申请日期 2012.07.16
申请人 Taiwan Semiconductor Manufacturing Co., Ltd. 发明人 Chen Chi-Ming;Chiu Han-Chin;Yu Chung-Yi;Tsai Chia-Shiung
分类号 H01L21/44 主分类号 H01L21/44
代理机构 Eschweiler & Associates, LLC 代理人 Eschweiler & Associates, LLC
主权项 1. An integrated circuit comprising: a silicon substrate having a first lattice structure; a GaN layer disposed over the silicon substrate and having a second lattice structure that differs from the first lattice structure; a lattice-matching structure arranged between the silicon substrate and the GaN layer and arranged to interface the first lattice structure to the second lattice structure; and a diffusion-barrier layer arranged between the silicon substrate and the lattice matching structure, the diffusion-barrier layer configured to limit diffusion of silicon and oxygen from the silicon substrate to the lattice matching structure, wherein the diffusion-barrier layer comprises metal oxide or SixNy.
地址 Hsin-Chu TW