Low-power voltage mode high speed driver

摘要

Differential voltage mode signal driver circuitry is presented in which a differential current mode amplifier input stage provides a differential signal, and an output stage includes a pair of bipolar transistors receiving the differential signal and being connected in series with a pair of cross-coupled field effect transistors that are coupled to corresponding current sources, where a negative impedance circuit is connected between the field effect transistors to substantially cancel a parasitic capacitance of a driven output circuit.

主权项

1. A signal driver apparatus, comprising:
an input circuit comprising first and second transistors forming a current mode amplifier with corresponding first and second control terminals coupled to receive a differential input signal from corresponding first and second driver input terminals, and corresponding first and second output terminals coupled to provide a differential current mode amplifier output signal to first and second current mode amplifier output nodes; and a driver output circuit comprising:
a first circuit branch, including a third transistor connected between a power supply node and a first node and including a third control terminal coupled with the first current mode amplifier output node, a first resistor connected between the first node and a first driver output terminal, a fourth transistor coupled between the first driver output terminal and a second node and including a fourth control terminal, and a first current source coupled between the second node and a ground node,a second circuit branch, including a fifth transistor coupled between the power supply node and a third node and including a fifth control terminal coupled with the second current mode amplifier output node, a second resistor connected between the third node and a second driver output terminal, a sixth transistor coupled between the second driver output terminal and a fourth node and including a sixth control terminal coupled with the first node, and a second current source coupled between the fourth node and the ground node, wherein the fourth control terminal of the fourth transistor is coupled with the third node, andan RC impedance circuit connected between the second node of the first circuit branch and the fourth node of the second circuit branch.