发明名称 Efficient scheduling of read and write transactions in dynamic memory controllers
摘要 Data-transfer transactions in the read and write directions may be balanced by taking snapshots of the transactions stored in a buffer, and executing transactions in the same direction back-to-back for each snapshot.
申请公布号 US8886844(B2) 申请公布日期 2014.11.11
申请号 US201213645969 申请日期 2012.10.05
申请人 Analog Devices, Inc. 发明人 Jandhyam Krishna S. A.;Navada Aravind K.
分类号 G06F3/00;G06F13/00;G06F5/00;G06F3/06 主分类号 G06F3/00
代理机构 Patent Capital Group 代理人 Patent Capital Group
主权项 1. A method of scheduling data-transfer transactions in two directions, the method comprising: (a) receiving data-transfer transactions from at least one master, each transaction being either a transaction in a first direction or a transaction in a second direction different from the first direction, and storing the transactions; (b) identifying, among the transactions cumulatively stored at a first point in time, all transactions in the first direction; (c) identifying, among the transactions cumulatively stored at a second point in time, all transactions in the second direction; (d) executing all of the identified transactions in the first direction before executing any transactions in the second direction; and (e) thereafter, executing all of the identified transactions in the second direction before executing any further transactions in the first direction; and wherein subsequent identification steps are performed after executing the transactions identified in steps (b) and (c).
地址 Norwood MA US