发明名称 |
Division of bit streams to produce spatial paths for multicarrier transmission |
摘要 |
A device for bit-demultiplexing in a multicarrier MIMO communication system (e.g. precoded spatial multiplexing MIMO communication systems using adaptive OFDM), including a multicarrier MIMO transmitter and a multicarrier MIMO receiver. The multicarrier MIMO transmitter includes a demultiplexer and symbol mapper unit receiving an input bit stream and generating a plurality of symbol streams, each symbol stream being associated with a different transmission channel and including a plurality of data symbols, each data symbol being attributed to a different carrier; one or more multicarrier modulators generating at least two multicarrier modulated signals based on the symbol streams; and at least two transmit ports respectively transmitting the at least two multicarrier modulated signals, wherein a data throughput rate of each transmission channel is separately variable. |
申请公布号 |
US8885686(B2) |
申请公布日期 |
2014.11.11 |
申请号 |
US201213601049 |
申请日期 |
2012.08.31 |
申请人 |
Sony Corporation |
发明人 |
Schwager Andreas;Lu Weiyun;Stadelmeier Lothar |
分类号 |
H04B1/00;H04L5/00;H04L27/26 |
主分类号 |
H04B1/00 |
代理机构 |
Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P. |
代理人 |
Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P. |
主权项 |
1. A power line communication (PLC) device adapted for transmitting data symbols on a plurality of sub-carriers via a first transmission channel and a second transmission channel, comprising:
transmitter circuitry configured to transmit signals over a PLC network, the PLC network including multiple wired transmission paths for transmitting the data symbols on the plurality of sub-carriers via the first transmission channel and the second transmission channel, and the transmitter circuitry including
a demultiplexer circuit configured to receive an input bit stream and to provide a first and a second split bit stream, wherein continuous sequences of consecutive bits of the input bit stream are alternately allocated to the first and the second split bit streams;a first symbol mapper circuit configured to map bits included in the first split bit stream to first data symbols for the sub-carriers of the first transmission channel of the multiple wired transmission paths of the PLC network; anda second symbol mapper circuit configured to map bits included in the second split bit stream to second data symbols for the sub-carriers of the second transmission channel of the multiple wired transmission paths of the PLC network, wherein first and second data symbols assigned to a corresponding sub-carrier of the first and second transmission channels represent a continuous bit sequence in the input bit stream. |
地址 |
Tokyo JP |