Data driving apparatus and operation method thereof and display using the same

摘要

A data driving apparatus includes two data driving circuits, each including a timing controller with a clock generator and configured to receive a specific portion of data corresponding to a row of pixel in an image frame, and, after receiving the specific portion of the data, process the portion of the data; wherein the two timing controllers have different data operation times. One timing controller outputs an enable command to another one once the processing of the respective portion of the data is complete. Then, another timing controller starts to process the respective portion of the data and output an output command to the first data driving circuit in response to a finish of the processing of the second portion of the data and thereby controlling the two data driving circuits to output the processed data. An operation method thereof and a display using the same are also provided.

主权项

1. A data driving apparatus, comprising:
a first data driving circuit configured to receive a first portion of data corresponding to a row of pixel in an image frame, wherein the first data driving circuit comprises a first timing controller and the first timing controller comprises a first clock generator; and a second data driving circuit configured to receive a second portion of the data corresponding to the row of pixel in the image frame, wherein the second data driving circuit comprises a second timing controller and the second timing controller comprises a second clock generator; wherein the first timing controller is further configured to, after receiving the first portion of the data, process the first portion of the data according to a first clock generated by the first clock generator and output an enable command to the second timing controller in response to a finish of the processing of the first portion of the data, and the second timing controller is further configured to start, in response to the enable command, to process the second portion of the data according to a second clock generated by the second clock generator and output an output command to the first data driving circuit in response to a finish of the processing of the second portion of the data and thereby controlling the first and second data driving circuits to output a processed first and a processed second portions of the data, respectively.