Circuit simulation acceleration using model caching

摘要

A mechanism for improving speed of simulation of complex circuits that include transistors and other devices that share similar properties is provided. Circuit simulation speed is improved by efficiently identifying transistors and other devices having identical properties that share a same state at the time of interest in the simulation. Transistors and other devices are collected into groups having the same characteristics and topologies prior to simulation. Then during simulation, a determination is made as to whether a previously-evaluated transistor or device in the same group as a presently-being evaluated transistor or device has terminal input values that are the same, or nearly the same. If so, then output values of the previously-evaluated transistor or device are used in calculating the output values of the present transistor or device.

主权项

1. A method implemented by a semiconductor design system for simulating a circuit, the method comprising:
generating, from a schematic description of a semiconductor device, a first set of data comprising descriptions of circuit elements in the semiconductor device and connectivity of the circuit elements in the semiconductor device; calculating, by an analysis engine of the semiconductor design system, using the first set of data, a set of approximate input values for a set of actual input values of one of the circuit elements in the semiconductor device; determining, by the analysis engine, a hash value for the set of approximate input values; and if a model cache entry in a model cache stored in a first memory coupled to the analysis engine and associated with the one of the circuit elements and the hash value comprises values matching the approximate input values, then
determining, by the analysis engine, previously calculated output values corresponding to the model cache entry, andcalculating, by the analysis engine, output values for the one of the circuit elements using the previously calculated output values, stored in a second memory coupled to the analysis engine, corresponding to the model cache entry and the set of actual input values of the circuit element.