Magnetoresistive logic cell and method of use

摘要

A magnetoresistive logic cell (MRLC) is described that includes two MTJs in series that share a common free layer (CFL). The relative magnetization orientations of the CFL and the switchable reference layer (SRL) in MTJ-1 dominate the overall resistance of the MRLC without regard to the fixed magnetization orientation of the nonswitchable reference layer in MTJ-2. The high resistance state of the MRLC occurs when the switchable reference and common free layers have opposite magnetization orientations. The low resistance state occurs when the orientations are the same. This behavior allows the MRLC to be used as a logical comparator. The CFL is switched by STT effect by application of selected relatively short voltage pulses that do not switch the SRL. The SRL is switched with reference to the CFL by a voltage effect generated by a selected longer voltage pulse that does not switch the CFL.

主权项

1. A magnetoresistive logic cell (MRLC) comprising:
a first magnetic tunnel junction (MTJ-1) formed by a first reference layer, a first junction layer and a free layer a magnetization direction of the first reference layer being switchable by application of a first voltage pulse to the MRLC to be parallel to the free layer magnetization direction, which is unchanged by said first pulse; a second magnetic tunnel junction (MTJ-2) formed by the free layer, a second junction layer and a second reference layer, MTJ-2 having a substantially lower resistance than MTJ-1, the magnetization direction of the free layer being switchable to be parallel or antiparallel to the magnetization direction of the second reference layer by application of either a second or a third voltage pulse to the MRLC that leaves the magnetization direction of the first reference layer unchanged; and MTJ-1 and MTJ-2 being in series.