| 发明名称 |
III-NITRIDE TRANSISTOR LAYOUT |
| 摘要 |
<p>A semiconductor device (100) containing a GaN FET (124) has an isolating gate structure (112) outside the channel area which is operable to block current in the two-dimensional electron gas between two regions of the semiconductor device. The isolating gate structure(112) is formed concurrently with the gate of the GaN FET, and has a same structure as the gate.</p> |
| 申请公布号 |
WO2014179796(A1) |
申请公布日期 |
2014.11.06 |
| 申请号 |
WO2014US36788 |
申请日期 |
2014.05.05 |
| 申请人 |
TEXAS INSTRUMENTS INCORPORATED;TEXAS INSTRUMENTS JAPAN LIMITED |
发明人 |
PENDHARKAR, SAMEER;TIPIRNENI, NAVEEN;JOH, JUNGWOO |
| 分类号 |
H01L29/772;H01L21/335 |
主分类号 |
H01L29/772 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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