HIGH VOLTAGE AND ULTRA-HIGH VOLTAGE SEMICONDUCTOR DEVICES WITH INCREASED BREAKDOWN VOLTAGES

摘要

A lateral DMOS transistor is provided with a source region, a drain region, and a conductive gate. The drain region is laterally separated from the conductive gate by a field oxide that encroaches beneath the conductive gate. The lateral DMOS transistor may be formed in a racetrack-like configuration with the conductive gate including a rectilinear portion and a curved portion and surrounded by the source region. Disposed between the conductive gate and the trapped drain is one or more levels of interlevel dielectric material. One or more groups of isolated conductor leads are formed in or on the dielectric layers and may be disposed at multiple device levels. The isolated conductive leads increase the breakdown voltage of the lateral DMOS transistor particularly in the curved regions where electric field crowding can otherwise degrade breakdown voltages.

主权项

1. A transistor structure comprising:
a gate electrode having straight portions and a curved portion, a source region disposed outside said gate electrode; a drain region formed inside said gate electrode; a dielectric disposed between said gate electrode and said drain region; and, a plurality of isolated floating conductor leads disposed at least one of in and on said dielectric, said isolated floating conductor leads each having straight portions and a curved portion and formed at multiple device levels such that portions of said isolated floating conductor leads formed at one device level directly overlap portions of said isolated floating conductor leads formed at another device level.