发明名称 |
MASK PATTERN FOR HOLE PATTERNING AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE USING THE SAME |
摘要 |
A method for fabricating a semiconductor device includes forming an etching target layer over a substrate including a first region and a second region; forming a hard mask layer over the etching target layer; forming a first etch mask over the hard mask layer, wherein the first etch mask includes a plurality of line patterns and a sacrificial spacer layer formed over the line patterns; forming a second etch mask over the first etch mask, wherein the second etch mask includes a mesh type pattern and a blocking pattern covering the second region; removing the sacrificial spacer layer; forming hard mask layer patterns having a plurality of holes by etching the hard mask layer using the second etch mask and the first etch mask; and forming a plurality of hole patterns in the first region by etching the etching target layer using the hard mask layer patterns. |
申请公布号 |
US2014326408(A1) |
申请公布日期 |
2014.11.06 |
申请号 |
US201414334139 |
申请日期 |
2014.07.17 |
申请人 |
SK hynix Inc. |
发明人 |
SUN Jun-Hyeub;LEE Sung-Kwon;LEE Sang-Oh |
分类号 |
H01L21/67 |
主分类号 |
H01L21/67 |
代理机构 |
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代理人 |
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主权项 |
1. A mask pattern suitable for patterning holes in a cell matrix region, the mask pattern comprising:
a plurality of lower level line patterns formed over a hard mask layer; a plurality of upper level line patterns extending in a direction crossing with the lower level line patterns, wherein the plurality of upper level line patterns are located at a vertically higher level than the plurality of lower level line patterns; and a blocking pattern covering an edge region of the cell matrix region. |
地址 |
Gyeonggi-do KR |