| 摘要 |
PROBLEM TO BE SOLVED: To enable accurate control of a delay amount even when it is required to greatly delay a reading timing in an image reading device that can suppress variation of the reading timing due to the frequency of a spread spectrum clock.SOLUTION: A delay circuit 12 receives an AD conversion clock ADCLK representing a reading clock, and branches the AD conversion clock ADCLK to four paths. A signal of each path is input to a selector circuit 11 through zero to six delay elements 17. A delay circuit 13 receives an AD conversion clock ADCLK which is delayed by the amount corresponding to one period of a spread clock SSCG_CLK by a flip flop 14, and executes the same delay correction as the delay circuit 12. An AD conversion clock ADCLK corresponding to the frequency level of the spread clock SSCG_CLK out of AD conversion clocks ADCLK input to the selector circuit 11 with different delay amounts is output from the selector circuit 11. |
