| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor storage device capable of stable operation without margin design, independently of the design size of each transistor configuring a circuit. SOLUTION: A semiconductor storage device is provided with a memory cell 1 comprising: a D latch circuit 2 having a data input terminal D, a write enable input terminalϕ, and a data output terminal Q<SB POS="POST">-</SB>, which passes the voltage of a write data signal of the data input terminal D when a write selection signal is asserted, holds the voltage of the write data signal when the write selection signal is negated, and outputs the inverted value of the passed/held voltage from the data output terminal Q<SB POS="POST">-</SB>; and a tri-state buffer 3 connected between the data output terminal Q<SB POS="POST">-</SB>of the D latch circuit 2 and a read data line RD, which outputs the inverted value of the voltage of the data output terminal Q<SB POS="POST">-</SB>to the read data line RD when a read selection signal is asserted, and puts the output into a high-impedance state when the read selection signal is negated. COPYRIGHT: (C)2012,JPO&INPIT |
