发明名称 Semiconductor device and manufacturing method thereof
摘要 An object is to reduce a capacitance value of parasitic capacitance without decreasing driving capability of a transistor in a semiconductor device such as an active matrix display device. Further, another object is to provide a semiconductor device in which the capacitance value of the parasitic capacitance was reduced, at low cost. An insulating layer other than a gate insulating layer is provided between a wiring which is formed of the same material layer as a gate electrode of the transistor and a wiring which is formed of the same material layer as a source electrode or a drain electrode.
申请公布号 US8878175(B2) 申请公布日期 2014.11.04
申请号 US201213541094 申请日期 2012.07.03
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Yamazaki Shunpei
分类号 H01L29/12;H01L29/10;H01L27/12;H01L29/786 主分类号 H01L29/12
代理机构 Robinson Intellectual Property Law Office, P.C. 代理人 Robinson Eric J.;Robinson Intellectual Property Law Office, P.C.
主权项 1. A display device comprising: a first wiring including a gate electrode over a substrate; a gate insulating layer over the gate electrode; an oxide semiconductor layer over the gate insulating layer; a second wiring including one of a source electrode and a drain electrode electrically connected to the oxide semiconductor layer; an insulating layer over the oxide semiconductor layer; an organic insulating layer over the insulating layer; and a pixel electrode layer over the organic insulating layer, wherein the pixel electrode layer is in electrical contact with the other of the source electrode and the drain electrode through a contact hole opened in the insulating layer and the organic insulating layer, wherein the first wiring and the second wiring include a portion overlapped with each other, and wherein a transparent conductive layer overlaps the portion.
地址 Atsugi-shi, Kanagawa-ken JP