发明名称 Microprocessor mechanism for decompression of fuse correction data
摘要 An apparatus includes a semiconductor fuse array and a plurality of cores. The semiconductor fuse array is disposed on a die, into which is programmed configuration data. The array has a first plurality of fuses and a second plurality of fuses. The first plurality of fuses stores the configuration data in an encoded and compressed format. The second plurality of fuses stores first compressed fuse correction data that indicates locations and values corresponding to a first one or more fuses within the first plurality of fuses whose states are to be changed from that which was previously stored. The plurality of cores is disposed on the die, where each of the plurality of cores is coupled to the array and accesses all of the compressed configuration data during power-up/reset, for initialization of elements within the each of the plurality of cores.
申请公布号 US8879345(B1) 申请公布日期 2014.11.04
申请号 US201313972768 申请日期 2013.08.21
申请人 Via Technologies, Inc. 发明人 Henry G. Glenn;Jain Dinesh K.
分类号 G11C17/18;G11C17/16 主分类号 G11C17/18
代理机构 代理人 Huffman Richard K.;Huffman James W.
主权项 1. An apparatus for reprogramming an integrated circuit device, the apparatus comprising: a semiconductor fuse array, disposed on a die, into which is programmed configuration data, said semiconductor fuse array comprising: a first plurality of semiconductor fuses, configured to store said configuration data in an encoded and compressed format; anda second plurality of semiconductor fuses, configured to store first compressed fuse correction data that indicates locations and values corresponding to a first one or more fuses within said first plurality of fuses whose states are to be changed from that which was previously stored; and a plurality of microprocessor cores, disposed on said die, wherein each of said plurality of microprocessor cores is coupled to said shared fuse array and is configured to access all of said compressed configuration data during power-up/reset, for initialization of elements within said each of said plurality of cores, said each of said plurality of cores comprising: a fuse correction decompressor, configured to decompress said first compressed fuse correction data, and to distribute decompressed fuse correction data to other decompressors that change said states from that which was previously stored prior to decompression of said configuration data.
地址 New Taipei TW