发明名称 |
Power management in semiconductor memory system |
摘要 |
A method for operating a memory module device. The method can include transferring a chip select, command, and address information from a host memory controller. The host memory controller can be coupled to a memory interface device, which can be coupled to a memory module. The memory module can comprise a plurality of memory devices. The chip select, command and address information can be received at the memory interface using a command-and-address-latency (CAL) mode. Control logic can be used to initiate a power state transition from a first power state to a second power state of an input termination circuit in the memory interface device. |
申请公布号 |
US8879348(B2) |
申请公布日期 |
2014.11.04 |
申请号 |
US201414178241 |
申请日期 |
2014.02.11 |
申请人 |
Inphi Corporation |
发明人 |
Wang David T. |
分类号 |
G11C7/00;G11C11/4074;G11C11/4093;G11C11/4072;G11C5/14 |
主分类号 |
G11C7/00 |
代理机构 |
Ogawa P.C. |
代理人 |
Ogawa Richard T.;Ogawa P.C. |
主权项 |
1. A computing apparatus, the apparatus comprising:
a memory interface device coupled to a memory module, and configured to receive a chip select, command, and address information, using a command-and-address-latency (CAL) mode transferred from a host memory controller, the host memory controller being coupled to the memory interface device, the memory module comprising a plurality of memory devices; a control logic configured to initiate a power state transition from a first power state to a second power state of an input termination circuit in the memory interface device. |
地址 |
Santa Clara CA US |