Compensation loop for read voltage adaptation

摘要

The disclosure is directed to a system and method for nominal read voltage variations of a flash device. N reads are performed, each at a selected voltage offset from an initial read voltage. An N bit digital pattern associated with the selected voltage offsets is generated for the N reads. The N bit digital pattern generated by the N reads is mapped to a signed representation. A voltage adjustment based upon the signed representation is applied to at least partially compensate for a variation of the nominal read voltage to reduce bit error rate of the flash device.

主权项

1. A system for compensating nominal voltage variations of a flash device, comprising:
a flash device configured to execute N reads, each of the N reads having a selected voltage offset from an initial nominal read voltage, the N reads generating an N bit digital pattern associated with the selected voltage offsets; a mapping module configured to receive the N bit digital pattern generated by the N reads, the mapping module further configured to map the N bit digital pattern to a signed representation; and a voltage compensator configured to provide a voltage adjustment based upon the signed representation to at least partially compensate for a variation of the nominal read voltage.