发明名称 |
Semiconductor light emitting device and method for manufacturing the same |
摘要 |
According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a second semiconductor layer and a light emitting part. The first semiconductor layer includes an n-type semiconductor layer. The second semiconductor layer includes a p-type semiconductor layer. The light emitting part is provided between the first semiconductor layer and the second semiconductor layer, and includes a plurality of barrier layers and a well layer provided between the plurality of barrier layers. The first semiconductor layer has a first irregularity and a second irregularity. The first irregularity is provided on a first major surface of the first semiconductor layer on an opposite side to the light emitting part. The second irregularity is provided on a bottom face and a top face of the first irregularity, and has a level difference smaller than a level difference between the bottom face and the top face. |
申请公布号 |
US8877526(B2) |
申请公布日期 |
2014.11.04 |
申请号 |
US201313834164 |
申请日期 |
2013.03.15 |
申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
Ono Hiroshi;Hikosaka Toshiki;Morioka Tomoko;Oka Toshiyuki;Nunoue Shinya |
分类号 |
H01L33/22;H01L33/20 |
主分类号 |
H01L33/22 |
代理机构 |
Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P. |
代理人 |
Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P. |
主权项 |
1. A method for manufacturing a semiconductor light emitting device including a first semiconductor layer including an n-type semiconductor layer; a second semiconductor layer including a p-type semiconductor layer; and a light emitting part provided between the first semiconductor layer and the second semiconductor layer, and including a plurality of barrier layers and a well layer provided between the barrier layers, the first semiconductor layer having: a first major surface on an opposite side to the light emitting part, a first irregularity provided on the first major surface and having a bottom face and a top face, and a second irregularity provided on the bottom face and the top face and having a bottom portion and a top portion, the first irregularity having a first level difference between the bottom face and the top face along a first direction from the first semiconductor layer toward the second semiconductor layer; and the second irregularity having a second level difference between the bottom portion and the top portion along the first direction, the second level difference being smaller than the first level difference, the method comprising:
forming a third irregularity serving as a basis of the second irregularity on a substrate major surface of a substrate; forming a mask material having a pattern shape corresponding to a pattern of the first irregularity on the substrate major surface on which the third irregularity is formed; processing the substrate major surface using the mask material as a mask to form a fourth irregularity serving as a basis of the first irregularity; and forming the first semiconductor layer on the substrate major surface on which the third irregularity and the fourth irregularity have been formed. |
地址 |
Minato-ku JP |