Efficient low-latency buffer

摘要

An efficient low latency buffer, and method of operation, is described. The efficient low latency buffer may be used as a bi-directional memory buffer in an audio playback device to buffer both output and input data. An application processor coupled to the bi-directional memory buffer is responsive to an indication to write data to the bi-directional memory buffer reads a defined size of input data from the bi-directional memory buffer. The input data read from the bi-directional memory buffer is replaced with output data of the defined size. In response to a mode-change signal, the defined size of data is changed that is read and written from and to the bi-directional memory buffer. The buffer may allow the application processor to enter a low-powered sleep mode more frequently.

主权项

1. An application processor for reading and writing data from and to a bi-directional memory buffer, the application processor configured to:
responsive to a first control signal indicating that data can be provided to the bi-directional memory buffer, read a predefined size of input data from the bi-directional memory buffer, and replace the input data read from the bi-directional memory buffer with output data of the predefined size; responsive to a second control signal, change the predefined size of data that is read from and written to the bi-directional memory buffer; and process the read input data to identify one or more control commands provided as one or more audio tones in the input data.