Adaptive clock mismatch compensation symbol insertion in signal transmissions

摘要

A transmitting interconnect interface inserts clock mismatch compensation symbols into a transmitted data stream so as to allow the receiving interconnect interface to compensate for clock frequency mismatch between transmit-side and receive-side clocks. The transmitting interconnect interface adjusts the rate of insertion of these symbols based on a determination of the clock frequency mismatch. The transmitting interconnect interface can incrementally adjust the insertion rate to change substantially proportionally with changes in the clock frequency mismatch. Alternatively, the transmitting interconnect interface can set the insertion rate to one of two levels. By adapting the insertion rate to the current measured clock frequency mismatch, the bandwidth penalty incurred by transmitting clock mismatch compensation symbols in excess of that necessary to permit receiver clock tolerance compensation can be reduced, thereby permitting more transmit bandwidth to be used for transmitting data.

主权项

1. A method of operating a system comprising a first device and a second device coupled via an interconnect, the method comprising:
adjusting a rate of insertion of clock mismatch compensation symbols into a data stream transmitted by the first device via the interconnect responsive to a frequency mismatch between a first clock signal used by the first device and a second clock signal used by the second device; and wherein adjusting the rate of insertion of clock mismatch compensation symbols comprises:
setting the rate of insertion of clock mismatch compensation symbols to a first predefined rate responsive to the frequency mismatch being greater than a threshold; andsetting the rate of insertion of clock mismatch compensation symbols to a second predefined rate responsive to the frequency mismatch being not greater than the threshold, the second predefined rate less than the first predefined rate.