| 摘要 |
<p>The present invention relates to the field of power line carrier communication simulation technology, and more particularly to a method and system for simulating power line carrier communication system. In the simulation model of the sending end and the simulation model of the receiving end constructed by the simulation method and system, each of the channel encoding model and the channel decoding model includes a simulation model of a ARM core chip and a peripheral logic circuit of the ARM core chip, the sending end includes a simulation model of a RS error correction encoding algorithm of the ARM core chip, and the receiving end includes a simulation model of a RS error correction decoding algorithm of the ARM core chip. Since the ARM core chip has strong data processing capability, and the cost of the ARM core chip is generally lower than the cost of a DSP chip or a FPGA chip, a RS cyclic error correction code algorithm with strong error correction capability can be achieved at a low cost by combining the ARM core chip with the RS error correction encoding and decoding algorithms which can ensure stable transmission of power line carrier signals.</p> |
