发明名称 DRIVING METHOD OF NON-VOLATILE MEMORY ELEMENT AND NON-VOLATILE MEMORY DEVICE
摘要 In a driving method of a non-volatile memory element, the polarity of a write voltage pulse applied to change a variable resistance layer from a high-resistance state to a low-resistance state is such that an input/output terminal which is more distant from the variable resistance element becomes a source terminal, and when a first write voltage pulse is applied to change the variable resistance layer in the high-resistance state to the low-resistance state, a first gate voltage is applied to a gate terminal, while when a second write voltage pulse which is greater in absolute value of voltage than the first write voltage pulse is applied to change the variable resistance layer in an excess-resistance state to the low-resistance state, a second gate voltage which is smaller in absolute value than the first gate voltage is applied to the gate terminal.
申请公布号 US2014321197(A1) 申请公布日期 2014.10.30
申请号 US201414265222 申请日期 2014.04.29
申请人 PANASONIC CORPORATION 发明人 NINOMIYA Takeki;KATAYAMA Koji;TAKAGI Takeshi;WEI Zhiqiang
分类号 G11C13/00 主分类号 G11C13/00
代理机构 代理人
主权项 1. A method of driving a non-volatile memory element including: a variable resistance element including a first electrode, a second electrode, and a variable resistance layer which is disposed between the first electrode and the second electrode and reversibly changes its resistance state between a low-resistance state and a high-resistance state in which a resistance value is greater than a resistance value corresponding to the low-resistance state, in response to a voltage pulse applied between the first electrode and the second electrode; and a field effect transistor including a first input/output terminal connected to the first electrode, a second input/output terminal, and a gate terminal for controlling electric conduction between the first input/output terminal and the second input/output terminal, the method comprising: applying an erase voltage pulse with a first polarity between the second electrode and the second input/output terminal, to change the variable resistance layer from the low-resistance state to the high-resistance state; applying a write voltage pulse with a second polarity which is different from the first polarity, between the second electrode and the second input/output terminal, to change the variable resistance layer from the high-resistance state to the low-resistance state; wherein the second polarity is such that the second input/output terminal of the field effect transistor becomes a source terminal; applying a first gate voltage to the gate terminal of the field effect transistor, when a first write voltage pulse is applied between the second electrode and the second input/output terminal, to change the variable resistance layer in the high-resistance state to the low-resistance state; and applying a second gate voltage which is smaller in absolute value than the first gate voltage, to the gate terminal of the field effect transistor, when a second write voltage pulse which is greater in absolute value of voltage than the first write voltage pulse is applied between the second electrode and the second input/output terminal, to change the variable resistance layer in an excess-resistance state to the low-resistance state.
地址 Osaka JP