发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND DRIVE APPARATUS INCLUDING THE SAME
摘要 A semiconductor integrated circuit includes a first transmission circuit generating and outputting a first transmission signal reflecting a first data signal supplied from outside, a first reception circuit reproducing the first data signal based on a first reception signal, a first isolation element isolating the first transmission circuit from the first reception circuit and transmitting the first transmission signal as the first reception signal, a second transmission circuit generating and outputting a second transmission signal reflecting a second data signal supplied from outside, a second reception circuit reproducing the second data signal based on a second reception signal, a second isolation element isolating the second transmission circuit from the second reception circuit and transmitting the second transmission signal as the second reception signal, and a third transmission circuit generating and outputting a third transmission signal reflecting the second data signal.
申请公布号 US2014325322(A1) 申请公布日期 2014.10.30
申请号 US201414330797 申请日期 2014.07.14
申请人 Renesas Electronics Corporation 发明人 KAERIYAMA Shunichi
分类号 G06F11/08 主分类号 G06F11/08
代理机构 代理人
主权项 1. A semiconductor integrated circuit comprising: a first transmission circuit generating and outputting a first transmission signal reflecting a first data signal supplied from outside; a first reception circuit reproducing the first data signal based on a first reception signal; a first isolation element isolating the first transmission circuit from the first reception circuit and transmitting the first transmission signal as the first reception signal; a second transmission circuit generating and outputting a second transmission signal reflecting a second data signal supplied from outside; a second reception circuit reproducing the second data signal based on a second reception signal; a second isolation element isolating the second transmission circuit from the second reception circuit and transmitting the second transmission signal as the second reception signal; a third transmission circuit generating and outputting a third transmission signal reflecting the second data signal; a third reception circuit reproducing the second data signal based on a third reception signal; a third isolation element isolating the third transmission circuit from the third reception circuit and transmitting the third transmission signal as the third reception signal; and a control part which outputs a stop signal regardless of the first data signal supplied from outside to the first transmission circuit when the control part decides that both the first data signal reproduced by the first reception circuit and the second data signal reproduced by the third reception circuit are the same logical level signals.
地址 Kawasaki-shi JP