SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

摘要

Such a device is disclosed that includes: redundancy circuits for replacing defective memory cells included in a memory cell array; an electrical fuse circuit that stores addresses of the defective memory cells; a data determination circuit that generates a determination signal by determining whether test data read from the memory cell array is correct or incorrect; and an analysis circuit that supplies, in a first operation mode, the electrical fuse circuit with an address signal supplied when the determination signal is activated, and supplies, in a second operation mode, the electrical fuse circuit with an address signal supplied when a data mask signal supplied from outside is activated irrespective of the determination signal.

主权项

1. A method for manufacturing a memory device comprising the steps of:
performing a first operation test on a memory array formed on a semiconductor wafer; analyzing addresses of first defective memory cells detected by the first operation test to identify first defective addresses; performing primary replacement to replace the first defective memory cells with first redundant memory cells based on the first defective addresses; dicing the semiconductor wafer after performing the primary replacement to obtain a memory chip on which the memory array is integrated; packaging a plurality of semiconductor chips including at least the memory chip to obtain a packaged memory device; performing a second operation test on the packaged memory device; analyzing addresses of second defective memory cells detected by the second operation test to identify second defective addresses; and performing secondary replacement to replace the second defective memory cells with second redundant memory cells based on the second defective addresses.