发明名称 MEMORY SYSTEM COMPONENTS FOR SPLIT CHANNEL ARCHITECTURE
摘要 In one form, a memory module includes a first plurality of memory devices comprising a first rank and having a first group and a second group, and first and second chip select conductors. The first chip select conductor interconnects chip select input terminals of each memory device of the first group, and the second chip select conductor interconnects chip select input terminals of each memory device of the second group. In another form, a system includes a memory controller that performs a first burst access using both first and second portions of a data bus and first and second chip select signals in response to a first access request, and a second burst access using a selected one of the first and second portions of the data bus and a corresponding one of the first and second chip select signals in response to a second access request.
申请公布号 US2014325105(A1) 申请公布日期 2014.10.30
申请号 US201313871437 申请日期 2013.04.26
申请人 ADVANCED MICRO DEVICES, INC. 发明人 Prete Edoardo;Kashem Anwar;Amick Brian
分类号 H01L23/538;G06F13/16 主分类号 H01L23/538
代理机构 代理人
主权项 1. A memory module comprising: a first plurality of memory devices comprising a first rank, said first plurality of memory devices including a first group and a second group; a first chip select conductor and a second chip select conductor; and wherein said first chip select conductor interconnects chip select input terminals of each memory chip of said first group, and said second chip select conductor interconnects chip select input terminals of each memory chip of said second group.
地址 Sunnyvale CA US