发明名称 PHASE SYNCHRONIZATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To actualize the generation of a low jitter and a high frequency output clock signal by a single phase synchronization circuit.SOLUTION: The phase synchronization circuit includes: an oscillator, having a thin-film bulk acoustic wave resonator, for generating an output clock signal of a frequency according to a control voltage; a phase comparison unit for detecting an input clock signal and the output clock signal of the oscillator; and a voltage generator unit for generating the control voltage to control the oscillator according to the output coil signal output from the phase comparison unit. The band of the phase lock loop including the phase comparison circuit is set to be 300 Hz or lower.
申请公布号 JP2014207497(A) 申请公布日期 2014.10.30
申请号 JP20130082319 申请日期 2013.04.10
申请人 ASAHI KASEI ELECTRONICS CO LTD 发明人 SEIYAMA KAZUSHI
分类号 H03L7/093;H03B5/32;H03K3/354;H03L7/08;H04L7/033 主分类号 H03L7/093
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