| 摘要 |
A device generating specific information of a semiconductor device includes a bit generation unit including a glitch generation circuit and a bit conversion circuit for converting a shape of the glitch into an information bit. The glitch generation circuit includes a plurality of combinational circuits mounted thereon to output a plurality of different glitches. The bit generation unit further includes a selector for selecting one glitch from among the plurality of different glitches in response to a selection signal to output the selected one glitch to the bit conversion circuit. The device further includes a performance evaluation/control unit for outputting the selection signal to obtain a piece of bit information corresponding to each of the plurality of different glitches and specifying a glitch satisfying a desired performance based on the respective pieces of bit information. |
